In a multiprocessor computer system where coordination among processors occurs during system start, the processors need to have well defined protocols that operate at startup.
In one embodiment of such a system, a predetermined setting such as a jumper configuration selects one of the several processors in a multiprocessor system to initiate startup. This processor is designated as the bootstrap processor (BSP). The BSP is then responsible for starting up the other processors, known as application processors or APs. There may not be any inherent difference between the BSP and APs, though it is necessary that each processor be able to determine whether it is the BSP or an AP once a BSP has been selected. In such systems, startup protocols then need to be executed by the APs and the BSP in order for startup to be completed successfully.
Specifically, on system startup, the BSP needs to execute a protocol to discover the other processors in the system and determine if they are functional. If two or more processors of the system are each capable of operating over a range of speeds, or more specifically, frequencies, they may then need to be synchronized at a common frequency in order for the system to operate correctly. This synchronization problem is exacerbated when each processor, in turn, is operable in multiple frequency modes. A processor may be so designed in order to operate in a lower frequency mode in order to conserve power or to reduce heat dissipation, and switch to a higher frequency mode to increase computing power or when heat dissipation is not a significant constraint. In these situations each of the multiple frequency modes at which a processor may operate may itself have a range of frequencies at which the processor is operable when in that mode. For example, a processor may operate at any frequency between 667 MHz and 733 MHz in a low power mode and at any frequency between 1.33 GHz and 1.67 GHz in a high power mode. Therefore, a frequency common to all processors in each of these modes may also need to be determined.
Furthermore, any mechanism to determine a common frequency may in some instances fail, such as for example when a new processor is installed in a multiprocessor system that is in fact not compatible with one or more of the existing installed processors in terms of their frequency ranges. A system that synchronizes processor frequencies should be reliable in that it should in such a case be able to gracefully fall back to a smaller number of processors for startup or to abort a startup that cannot complete because of incompatibilities in frequency ranges that cannot be feasibly resolved within the set of processors in the system.
In order for two concurrently executing threads, potentially in two different processors, to execute a protocol to synchronize internal parameters such as clock frequencies, the two threads need a communication and coordination mechanism. In a shared memory implementation of such a mechanism, a read/write memory area may be used to store coordination variables such as semaphores that allow the processors to signal each other when specific events occur, as well as to store any data that is actually communicated between the two threads.